H(fsl,lx2160a-rdbfsl,lx2160a +7NXP Layerscape LX2160ARDBaliases=/soc/rtc@2800000B/soc/crypto@8000000I/soc/mmc@2140000N/soc/mmc@2150000S/soc/serial@21c0000cpus+cpu@0[cpuarm,cortex-a72gpsciu y@@cpu@1[cpuarm,cortex-a72gpsciu y@@cpu@100[cpuarm,cortex-a72gpsciu y@@cpu@101[cpuarm,cortex-a72gpsciu y@@cpu@200[cpuarm,cortex-a72gpsciu y@@cpu@201[cpuarm,cortex-a72gpsciu y@@cpu@300[cpuarm,cortex-a72gpsciu y@@cpu@301[cpuarm,cortex-a72gpsciu y@@cpu@400[cpuarm,cortex-a72gpsciu y@@cpu@401[cpuarm,cortex-a72gpsciu y@@cpu@500[cpuarm,cortex-a72gpsciu y@@ cpu@501[cpuarm,cortex-a72gpsciu y@@ cpu@600[cpuarm,cortex-a72gpsciu y@@ cpu@601[cpuarm,cortex-a72gpsciu y@@ cpu@700[cpuarm,cortex-a72gpsciu y@@ cpu@701[cpuarm,cortex-a72gpsciu y@@ l2-cache0cache@l2-cache1cache@l2-cache2cache@l2-cache3cache@l2-cache4cache@l2-cache5cache@ l2-cache6cache@ l2-cache7cache@ cpu-pw15arm,idle-state*PW15:Qbrpinterrupt-controller@6000000 arm,gic-v3Pu  +  msi-controller@6020000arm,gic-v3-itsu2timerarm,armv8-timer0   pmuarm,cortex-a72-pmu psci arm,psci-0.2nsmcmemory@80000000[memoryumemory-controller@1080000fsl,qoriq-memory-controlleru memory-controller@1090000fsl,qoriq-memory-controlleru  sysclk fixed-clocksysclkthermal-zonescluster6-7-thermal)7 tripscluster6-7-alertGLSbpassive cluster6-7-critGsS bcriticalcooling-mapsmap0^ cddr-ctrl5-thermal)7 tripsddr-cluster5-alertGLSbpassiveddr-cluster5-critGsS bcriticalwriop-thermal)7 tripswriop-alertGLSbpassivewriop-critGsS bcriticaldce-thermal)7 tripsdce-qbman-alertGLSbpassivedce-qbman-critGsS bcriticalccn-thermal)7 tripsccn-dpaa-alertGLSbpassiveccn-dpaa-critGsS bcriticalcluster4-thermal)7 tripsclust4-hsio3-alertGLSbpassiveclust4-hsio3-critGsS bcriticalcluster2-3-thermal)7 tripscluster2-3-alertGLSbpassivecluster2-3-critGsS bcriticalsoc simple-bus+rphy@1ea0000 fsl,lynx-28gu0}phy@1eb0000 fsl,lynx-28gu0} disabledcrypto@8000000fsl,sec-v5.0fsl,sec-v4.0 +u okayjr@10000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu jr@20000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu jr@30000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu jr@40000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu clock-controller@1300000fsl,lx2160a-clockgenu0 ysyscon@1e00000fsl,lx2160a-dcfgsysconuefuse@1e80000fsl,ls1028a-sfpu ysfpsyscon@1f70000fsl,lx2160a-iscsysconu+interrupt-controller@14&fsl,lx2160a-extirqfsl,ls1088a-extirqu       +tmu@1f80000fsl,qoriq-tmuu Հ}5T i2c@2000000fsl,vf610-i2c+u "ipg y  defaultgpio%  /! 9!okayi2c-mux@77 nxp,pca9547uw+i2c@2+upower-monitor@40 ti,ina220u@Ci2c@3+utemperature-sensor@4c nxp,sa56004uLR"temperature-sensor@4d nxp,sa56004uMR"i2c@2010000fsl,vf610-i2c+u "ipg y  defaultgpio#%$ /! 9! disabledi2c@2020000fsl,vf610-i2c+u #ipg y  defaultgpio%%& /! 9! disabledi2c@2030000fsl,vf610-i2c+u #ipg y  defaultgpio'%( /! 9! disabledi2c@2040000fsl,vf610-i2c+u Jipg y  defaultgpio)%* /! 9!okayrtc@51 nxp,pcf2129uQ ]+i2c@2050000fsl,vf610-i2c+u Jipg y  defaultgpio,%- /! 9! disabledi2c@2060000fsl,vf610-i2c+u Kipg y  defaultgpio.%/ /0 90 disabledi2c@2070000fsl,vf610-i2c+u Kipg y  defaultgpio.%/ /0 90 disabledspi@20c0000nxp,lx2160a-fspi+ u  qfspi_basefspi_mmap y fspi_enfspiokayflash@0+jedec,spi-nor{uflash@1+jedec,spi-nor{uspi@2100000"fsl,lx2160a-dspifsl,ls2085a-dspi+u  ydspi disabledspi@2110000"fsl,lx2160a-dspifsl,ls2085a-dspi+u  ydspi disabledspi@2120000"fsl,lx2160a-dspifsl,ls2085a-dspi+u  ydspi disabledmmc@2140000fsl,ls2080a-esdhcfsl,esdhcu  y okay"mmc@2150000fsl,ls2080a-esdhcfsl,esdhcu ? y /okay9Hcan@2180000fsl,lx2160ar1-flexcanu yipgperWokaycan-transceiverfLK@can@2190000fsl,lx2160ar1-flexcanu yipgperWokaycan-transceiverfLK@serial@21c0000arm,pl011arm,primecellyuartclkapb_pclku  okayserial@21d0000arm,pl011arm,primecellyuartclkapb_pclku !okayserial@21e0000arm,pl011arm,primecellyuartclkapb_pclku H disabledserial@21f0000arm,pl011arm,primecellyuartclkapb_pclku I disabledgpio@2300000 fsl,ls2080a-gpiofsl,qoriq-gpiou0 $r!gpio@2310000 fsl,ls2080a-gpiofsl,qoriq-gpiou1 $r0gpio@2320000 fsl,ls2080a-gpiofsl,qoriq-gpiou2 %rgpio@2330000 fsl,ls2080a-gpiofsl,qoriq-gpiou3 %rwatchdog@23a0000arm,sbsa-gwdt u:9 ;wakeup-controller@1e34040%fsl,lx2160a-rcpmfsl,qoriq-rcpm-2.1+u@@1rtc@2800000fsl,lx2160a-ftm-alarmu 1@ ,usb@3100000 snps,dwc3u Phost okayusb@3110000 snps,dwc3u Qhost okaysata@3200000fsl,lx2160a-ahci u  qahcisata-ecc  yokaysata@3210000fsl,lx2160a-ahci u! qahcisata-ecc  yokaysata@3220000fsl,lx2160a-ahci u" qahcisata-ecc a yokaysata@3230000fsl,lx2160a-ahci u# qahcisata-ecc d yokaypcie@3400000fsl,lx2160a-pcie u@ qcsr_axi_slaveconfig_axi_slave$lll 7aerpmeintr+[pciGQ[@@@e2mnopp3 disabledpcie@3500000fsl,lx2160a-pcie uP qcsr_axi_slaveconfig_axi_slave$qqq 7aerpmeintr+[pciGQ[@@@e2rstup3 disabledpcie@3600000fsl,lx2160a-pcie u` qcsr_axi_slaveconfig_axi_slave$vvv 7aerpmeintr+[pciGQ[@@@e2wxyzp3 disabledpcie@3700000fsl,lx2160a-pcie up qcsr_axi_slaveconfig_axi_slave${{{ 7aerpmeintr+[pciGQ[@@@e2|}~p3 disabledpcie@3800000fsl,lx2160a-pcie u qcsr_axi_slaveconfig_axi_slave$ 7aerpmeintr+[pciGQ[@@@e2p3 disabledpcie@3900000fsl,lx2160a-pcie u qcsr_axi_slaveconfig_axi_slave$ggg 7aerpmeintr+[pciGQ[@@@e2hijkp3 disablediommu@5000000 arm,mmu-500uz 3console@8340020fsl,dpaa2-consoleu4 ptp-timer@8b95000fsl,dpaa2-ptpuP ymdio@8b96000fsl,fman-memac-mdiou` Z+&% yokayethernet-phy@1ethernet-phy-id004d.d072 ]+uHethernet-phy@2ethernet-phy-id004d.d072 ]+uJethernet-phy@4ethernet-phy-ieee802.3-c45 ]+u7ethernet-phy@5ethernet-phy-ieee802.3-c45 ]+u9mdio@8b97000fsl,fman-memac-mdioup [+&% yokayethernet-phy@0ethernet-phy-id0210.7440u;mdio@8c07000fsl,fman-memac-mdioup+ disabledethernet-phy@0u4mdio@8c0b000fsl,fman-memac-mdiou+ disabledethernet-phy@0u5mdio@8c0f000fsl,fman-memac-mdiou+okayethernet-phy@0u6mdio@8c13000fsl,fman-memac-mdiou0+okayethernet-phy@0u8mdio@8c17000fsl,fman-memac-mdioup+ disabledethernet-phy@0u:mdio@8c1b000fsl,fman-memac-mdiou+ disabledethernet-phy@0u<mdio@8c1f000fsl,fman-memac-mdiou+ disabledethernet-phy@0u=mdio@8c23000fsl,fman-memac-mdiou0+ disabledethernet-phy@0u>mdio@8c27000fsl,fman-memac-mdioup+ disabledethernet-phy@0u?mdio@8c2b000fsl,fman-memac-mdiou°+ disabledethernet-phy@0u@mdio@8c2f000fsl,fman-memac-mdiou+ disabledethernet-phy@0uAmdio@8c33000fsl,fman-memac-mdiou0+ disabledethernet-phy@0uBmdio@8c37000fsl,fman-memac-mdioup+ disabledethernet-phy@0uCmdio@8c3b000fsl,fman-memac-mdiouð+ disabledethernet-phy@0uDmdio@8c3f000fsl,fman-memac-mdiou+ disabledethernet-phy@0uEmdio@8c43000fsl,fman-memac-mdiou0+ disabledethernet-phy@0uFmdio@8c47000fsl,fman-memac-mdioup+ disabledethernet-phy@0uGmdio@8c4b000fsl,fman-memac-mdiouİ+ disabledethernet-phy@0uIpinmux@70010012cpinctrl-singleu, + iic2-i2c-pins #iic2-gpio-pins $iic2-ftm-pins iic2-sdhc-pins iic3-i2c-pins 8%iic3-gpio-pins 8&iic3-can-pins 8iic3-event-pins 08iic4-i2c-pins 'iic4-gpio-pins @(iic4-can-pins iic4-event-pins iic5-i2c-pins )iic5-gpio-pins *iic5-sdhc-clk-pins iic5-spi3-pins iic6-i2c-pins p,iic6-gpio-pins p-iic6-sdhc-clk-pins  pxspi1-data74-pins xspi1-data74-gpio-pins xspi1-data30-pins xspi1-data30-gpio-pins xspi1-base-pins xspi1-base-gpio-pins sdhc1-base-sdhc-vsel-pins sdhc1-base-gpio-pins sdhc1-base-spi1-pins sdhc1-base-sdhc-spi3-pins sdhc1-base-sdhc-data4-pins sdhc1-dir-pins 8sdhc1-dir-gpio-pins 8sdhc1-dir-spi3-pins 8sdhc1-dir-sdhc-pins  8iic8-iic7-gpio-pins /iic8-iic7-i2c-pins .iic1-i2c-pins iic1-gpio-pins  fsl-mc@80c000000 fsl,qoriq-mc u @4e2p3+0 dpmacs+ethernet@1fsl,qoriq-mc-dpmacu$4ethernet@2fsl,qoriq-mc-dpmacu$5ethernet@3fsl,qoriq-mc-dpmacu$6/7:usxgmiiNin-band-statusethernet@4fsl,qoriq-mc-dpmacu$8/9:usxgmiiNin-band-statusethernet@5fsl,qoriq-mc-dpmacu$:/;ethernet@6fsl,qoriq-mc-dpmacu$</;ethernet@7fsl,qoriq-mc-dpmacu$=ethernet@8fsl,qoriq-mc-dpmacu$>ethernet@9fsl,qoriq-mc-dpmacu $?ethernet@afsl,qoriq-mc-dpmacu $@ethernet@bfsl,qoriq-mc-dpmacu $Aethernet@cfsl,qoriq-mc-dpmacu $Bethernet@dfsl,qoriq-mc-dpmacu $Cethernet@efsl,qoriq-mc-dpmacu$Dethernet@ffsl,qoriq-mc-dpmacu$Eethernet@10fsl,qoriq-mc-dpmacu$Fethernet@11fsl,qoriq-mc-dpmacu$G/H :rgmii-idethernet@12fsl,qoriq-mc-dpmacu$I/J :rgmii-idfirmwareopteelinaro,optee-tznsmcokaychosenVserial0:115200n8regulator-sb3v3regulator-fixedbMC34717-3.3VSBq2Z2Z" compatibleinterrupt-parent#address-cells#size-cellsmodelrtc1cryptommc0mmc1serial0device_typeenable-methodregclocksd-cache-sized-cache-line-sized-cache-setsi-cache-sizei-cache-line-sizei-cache-setsnext-level-cachecpu-idle-states#cooling-cellsphandlecache-unifiedcache-levelidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-us#interrupt-cellsrangesinterrupt-controllerinterruptsmsi-controller#msi-cellslittle-endian#clock-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicedma-ranges#phy-cellsstatusfsl,sec-eradma-coherentclock-namesinterrupt-mapinterrupt-map-maskfsl,tmu-rangefsl,tmu-calibration#thermal-sensor-cellspinctrl-namespinctrl-0pinctrl-1scl-gpiossda-gpiosshunt-resistorvcc-supplyinterrupts-extendedreg-namesm25p,fast-readspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthspi-num-chipselectsbus-numvoltage-rangessdhci,auto-cmd12sd-uhs-sdr104sd-uhs-sdr50sd-uhs-sdr25sd-uhs-sdr12broken-cdmmc-hs200-1_8vmmc-hs400-1_8vfsl,clk-sourcemax-bitrategpio-controller#gpio-cellstimeout-sec#fsl,rcpm-wakeup-cellsfsl,rcpm-wakeupdr_modesnps,quirk-frame-length-adjustmentusb3-lpm-capablesnps,dis_rxdet_inp3_quirksnps,incr-burst-type-adjustmentinterrupt-namesapio-winsppio-winsbus-rangemsi-parentiommu-map#iommu-cells#global-interruptsfsl,extts-fifoeee-broken-1000tpinctrl-single,bit-per-muxpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,bitspcs-handlephy-handlephy-connection-typemanagedstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-on