M8H(GMangoPi MQ Pro*!widora,mangopi-mq-proallwinner,sun20i-d1dcxo-clk !fixed-clock,dcxo?Ln6\display-engine#!allwinner,sun20i-d1-display-engined xdisabledsoc !simple-buspinctrl@2000000!allwinner,sun20i-d1-pinctrl0UWY[]_apbhosclosc '5CQ\ can0-pins_PB2PB3dcan0\can1-pins_PB4PB5dcan1\mmc0-pins_PF0PF1PF2PF3PF4PF5dmmc0\mmc1-pins_PG0PG1PG2PG3PG4PG5dmmc1\uart1-pg6-pins_PG6PG7duart1\ uart1-pg8-rts-cts-pins_PG8PG9duart1\ uart0-pb8-pins_PB8PB9duart0\ clock-controller@2001000!allwinner,sun20i-d1-ccuhosclosciosc?m\adc@2009000!allwinner,sun20i-d1-gpadcPz I xdisableddmic@20310002!allwinner,sun20i-d1-dmicallwinner,sun50i-h6-dmic(]\busmodz& rx xdisabledi2s@20330002!allwinner,sun20i-d1-i2sallwinner,sun50i-r329-i2s0+WSapbmodz#  rxtx xdisabledi2s@20340002!allwinner,sun20i-d1-i2sallwinner,sun50i-r329-i2s@,XTapbmodz$  rxtx xdisabledtimer@20500004!allwinner,sun20i-d1-timerallwinner,sun8i-a23-timerKLwatchdog@20500a06!allwinner,sun20i-d1-wdt-resetallwinner,sun20i-d1-wdt O  hosclosc xreservedserial@2500000!snps,dw-apb-uartP>z  txrxxokay defaultserial@2500400!snps,dw-apb-uartP?z  txrxxokay defaultbluetooth!realtek,rtl8723ds-bt   serial@2500800!snps,dw-apb-uartP@z  txrx xdisabledserial@2500c00!snps,dw-apb-uartP Az  txrx xdisabledserial@2501000!snps,dw-apb-uartPBz  txrx xdisabledserial@2501400!snps,dw-apb-uartPCz  txrx xdisabledi2c@2502000I!allwinner,sun20i-d1-i2callwinner,sun8i-v536-i2callwinner,sun6i-a31-i2cP Dz + +rxtx xdisabledi2c@2502400I!allwinner,sun20i-d1-i2callwinner,sun8i-v536-i2callwinner,sun6i-a31-i2cP$Ez , ,rxtx xdisabledi2c@2502800I!allwinner,sun20i-d1-i2callwinner,sun8i-v536-i2callwinner,sun6i-a31-i2cP(Fz - -rxtx xdisabledi2c@2502c00I!allwinner,sun20i-d1-i2callwinner,sun8i-v536-i2callwinner,sun6i-a31-i2cP,Gz . .rxtx xdisabledcan@2504000!allwinner,sun20i-d1-canP@%zBdefault xdisabledcan@2504400!allwinner,sun20i-d1-canPD&zCdefault xdisabledsyscon@3000000#!allwinner,sun20i-d1-system-control\dma-controller@3002000!allwinner,sun20i-d1-dma B%0 busmbusz!.0;\ efuse@3006000!allwinner,sun20i-d1-sid`crypto@3040000!allwinner,sun20i-d1-cryptoD "!2busmodramtrngzdram-controller@3102000!allwinner,sun20i-d1-mbus 0 Fmbusdram;/7mbusdrambus P@[mmc@4020000!allwinner,sun20i-d1-mmc8;8ahbmmczoahb{рxokay defaultmmc@4021000!allwinner,sun20i-d1-mmc9<9ahbmmczoahb{рxokaydefaultwifi@1    host-wakemmc@40220004!allwinner,sun20i-d1-emmcallwinner,sun50i-a100-emmc :=:ahbmmczoahbр -3 xdisabledspi@40250002!allwinner,sun20i-d1-spiallwinner,sun50i-r329-spiPJHahbmod  rxtxz xdisabledspi@4026000T!allwinner,sun20i-d1-spi-dbiallwinner,sun50i-r329-spi-dbiallwinner,sun50i-r329-spi` KIahbmod  rxtxz xdisabledusb@41000002!allwinner,sun20i-d1-musballwinner,sun8i-a33-musb-mcgz.;BGusbxokay Qperipheralphy@4100400!allwinner,sun20i-d1-usb-phy Fphy_ctrlpmu0pmu1usb0_phyusb1_phyz()ousb0_resetusb1_resetxokayYd\usb@4101000&!allwinner,sun20i-d1-ehcigeneric-ehci.ceaz*,BGusb xdisabledusb@4101400&!allwinner,sun20i-d1-ohcigeneric-ohci/caz*BGusb xdisabledusb@4200000&!allwinner,sun20i-d1-ehcigeneric-ehci 1dfbz+-BGusbxokayusb@4200400&!allwinner,sun20i-d1-ohcigeneric-ohci 2dbz+BGusbxokayethernet@45000003!allwinner,sun20i-d1-emacallwinner,sun50i-a64-emacP>macirqM stmmacethz ostmmacethu xdisabledmdio!snps,dwmac-mdioclock-controller@50000008!allwinner,sun20i-d1-de2-clkallwinner,sun50i-h5-de2-clkbusmodz?m\mixer@5100000 !allwinner,sun20i-d1-de2-mixer-0busmodz\portsport@1endpoint|\mixer@5200000 !allwinner,sun20i-d1-de2-mixer-1 busmodz\portsport@1endpoint|\dsi@5450000<!allwinner,sun20i-d1-mipi-dsiallwinner,sun50i-a100-mipi-dsiElobusmodz3BGdphy xdisabledportendpoint|\%phy@5451000>!allwinner,sun20i-d1-mipi-dphyallwinner,sun50i-a100-mipi-dphyElonbusmodz3Y\tcon-top@5460000!allwinner,sun20i-d1-tcon-topF irtpbustcon-tv0tve0dsi,tcon-top-tv0tcon-top-dsiz0?\portsport@0endpoint|\port@1endpoint@0|\#endpoint@2|\&port@2endpoint@1|\port@3endpoint@0| \$endpoint@2|!\'port@4endpoint|"\(port@5lcd-controller@5461000!allwinner,sun20i-d1-tcon-lcdFjqp ahbtcon-ch0,tcon-pixel-clockz46 olcdlvds?portsport@0endpoint@0|#\endpoint@1|$\ port@1endpoint@1|%\lcd-controller@5470000!allwinner,sun20i-d1-tcon-tvGks ahbtcon-ch1z5olcdportsport@0endpoint@0|&\endpoint@1|'\!port@1endpoint|(\"power-controller@7001000!allwinner,sun20i-d1-ppu)z)clock-controller@7010000!allwinner,sun20i-d1-r-ccuhoscloscioscpll-periph?m\)rtc@70900002!allwinner,sun20i-d1-rtcallwinner,sun50i-r329-rtc )) bushoscahb?\watchdog@6011000!allwinner,sun20i-d1-wdt   hoscloscinterrupt-controller@10000000)!allwinner,sun20i-d1-plicthead,c900-plic* * \watchdog@1700400!allwinner,sun20i-d1-wdtp   hosclosc xreservedkeys@20098006!allwinner,sun20i-d1-lradcallwinner,sun50i-r329-lradcMhz/ xdisabledi2s@20320002!allwinner,sun20i-d1-i2sallwinner,sun50i-r329-i2s *VRapbmodz"  rxtx xdisabledcpusn6cpu@0!thead,c906riscvcpu@ @+ 8riscv,sv39A+ Urv64imafdc_rv64i(nimafdczicntrzicsrzifenceizihpm,interrupt-controller!riscv,cpu-intc\*opp-table-cpu!operating-points-v2\+opp-408000000Q  opp-1080000000<  pmu !riscv,pmux@@!! x  ! @ @ vcc!regulator-fixedvccLK@.LK@\vcc-3v3!regulator-fixedvcc-3v32Z.2ZF\aliasesQ/soc/mmc@4021000/wifi@1[/soc/serial@2500000chosencserial0:115200n8leds !gpio-ledsled-0odstatus avdd2v8!regulator-fixedavdd2v8*.*F\dvdd!regulator-fixeddvddO.OFvdd-cpu!regulator-fixedvdd-cpu.F\,wifi-pwrseq!mmc-pwrseq-simpleu \ #address-cells#size-cellsmodelcompatibleclock-output-names#clock-cellsclock-frequencyphandleallwinner,pipelinesstatusrangesdma-noncoherentinterrupt-parentreginterruptsclocksclock-namesgpio-controllerinterrupt-controller#gpio-cells#interrupt-cellsvcc-pb-supplyvcc-pc-supplyvcc-pd-supplyvcc-pe-supplyvcc-pf-supplyvcc-pg-supplypinsfunction#reset-cellsresets#io-channel-cellsdmasdma-names#sound-dai-cellsreg-io-widthreg-shiftpinctrl-0pinctrl-namesuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiosdma-channelsdma-requests#dma-cellsreg-namesdma-ranges#interconnect-cellsreset-namescap-sd-highspeedmax-frequencyno-mmcbus-widthcd-gpiosdisable-wpvmmc-supplyvqmmc-supplymmc-pwrseqnon-removableinterrupt-namescap-mmc-highspeedmmc-ddr-1_8vmmc-ddr-3_3vno-sdno-sdioextconphysphy-namesdr_mode#phy-cellsusb1_vbus-supplysysconremote-endpoint#power-domain-cellsinterrupts-extendedriscv,ndevtimebase-frequencydevice_typed-cache-block-sized-cache-setsd-cache-sizei-cache-block-sizei-cache-setsi-cache-sizemmu-typeoperating-points-v2riscv,isariscv,isa-baseriscv,isa-extensions#cooling-cellscpu-supplyopp-hzopp-microvoltriscv,event-to-mhpmcountersriscv,event-to-mhpmeventriscv,raw-event-to-mhpmcountersregulator-nameregulator-min-microvoltregulator-max-microvoltvin-supplyethernet0serial0stdout-pathcolorreset-gpios