/8+(+h Microchip PolarFire-SoC SEV Kit&!microchip,mpfs-sev-kitmicrochip,mpfscpus,B@cpu@0 !sifive,e51sifive,rocket0riscv?cpuK@^k@x |rv64imacrv64i$imaczicntrzicsrzifenceizihpm disabledinterrupt-controller!riscv,cpu-intc cpu@1#!sifive,u54-mcsifive,rocket0riscv@@ ?cpuK@^@k)4  ?riscv,sv39x |rv64imafdcrv64i(imafdczicntrzicsrzifenceizihpmHRokayinterrupt-controller!riscv,cpu-intc cpu@2#!sifive,u54-mcsifive,rocket0riscv@@ ?cpuK@^@k)4  ?riscv,sv39x |rv64imafdcrv64i(imafdczicntrzicsrzifenceizihpmHRokayinterrupt-controller!riscv,cpu-intc cpu@3#!sifive,u54-mcsifive,rocket0riscv@@ ?cpuK@^@k)4  ?riscv,sv39x |rv64imafdcrv64i(imafdczicntrzicsrzifenceizihpmHRokayinterrupt-controller!riscv,cpu-intc cpu@4#!sifive,u54-mcsifive,rocket0riscv@@ ?cpuK@^@k)4  ?riscv,sv39x |rv64imafdcrv64i(imafdczicntrzicsrzifenceizihpmHRokayinterrupt-controller!riscv,cpu-intccpu-mapcluster0core0ccore1ccore2ccore3ccore4cmssrefclk !fixed-clockgtsY@syscontroller!microchip,mpfs-sys-controllerokaymssclkclk !fixed-clockgtĴsoc !simple-buscache-controller@20100005!microchip,mpfs-ccachesifive,fu540-c000-ccachecachexM@`m  clint@2000000&!sifive,fu540-c000-clintsifive,clint0xP        interrupt-controller@c000000)!sifive,fu540-c000-plicsifive,plic-1.0.0x H    dma-controller@3000000!!microchip,mpfs-pdmasifive,pdma0x   clkcfg@20002000!microchip,mpfs-clkcfg x >gclock-controller@38010000!microchip,mpfs-ccc@x8899g disabledclock-controller@38040000!microchip,mpfs-ccc@x8899g disabledclock-controller@38100000!microchip,mpfs-ccc@x88 99 g disabledclock-controller@38400000!microchip,mpfs-ccc@x8@89@9g disabledserial@20000000 !ns16550ax   Z# disabledserial@20100000 !ns16550ax   [# okayserial@20102000 !ns16550ax    \# okayserial@20104000 !ns16550ax @  ]# okayserial@20106000 !ns16550ax `  ^ #okaymmc@20008000 !microchip,mpfs-sd4hccdns,sd4hcx  X1 okay?ITewspi@20108000!microchip,mpfs-spix  6  disabledspi@20109000!microchip,mpfs-spix  7 disabledspi@21000000.!microchip,mpfs-qspimicrochip,coreqspi-rtl-v2x! U disabledi2c@2010a000,!microchip,mpfs-i2cmicrochip,corei2c-rtl-v7x  :tokayi2c@2010b000,!microchip,mpfs-i2cmicrochip,corei2c-rtl-v7x  =t disabledcan@2010c000!microchip,mpfs-canx % 8 disabledcan@2010d000!microchip,mpfs-canx % 9 disabledethernet@20110000!microchip,mpfs-macbcdns,macbx   @ABCDE pclkhclkokaysgmiiethernet-phy@9x ethernet-phy@8xethernet@20112000!microchip,mpfs-macbcdns,macbx   FGHIJK pclkhclkokaysgmiigpio@20120000!microchip,mpfs-gpiox   disabledgpio@20121000!microchip,mpfs-gpiox   disabledgpio@20122000!microchip,mpfs-gpiox   okay55555555555555555555555555555555rtc@20124000!microchip,mpfs-rtcx @ PQ! rtcrtcrefokayusb@20201000!microchip,mpfs-musbx  VWdmamcokay-otgmailbox@37020000!microchip,mpfs-mailbox0x7X 1@7 `5okayspi@37020100.!microchip,mpfs-qspimicrochip,coreqspi-rtl-v2x7 n disabledfabric-clk3 !fixed-clockgtfabric-clk1 !fixed-clockgtsY@aliasesA/soc/ethernet@20112000K/soc/serial@20000000S/soc/serial@20100000[/soc/serial@20102000c/soc/serial@20104000k/soc/serial@20106000chosensserial1:115200n8reserved-memorybuffer@80000000!shared-dma-poolxbuffer@c4000000!shared-dma-poolxbuffer@d4000000!shared-dma-poolxmemory@1000000000?memoryxv #address-cells#size-cellsmodelcompatibletimebase-frequencydevice_typei-cache-block-sizei-cache-setsi-cache-sizeregriscv,isariscv,isa-baseriscv,isa-extensionsclocksstatusphandle#interrupt-cellsinterrupt-controllerd-cache-block-sized-cache-setsd-cache-sized-tlb-setsd-tlb-sizei-tlb-setsi-tlb-sizemmu-typetlb-splitnext-level-cachecpu#clock-cellsclock-frequencymboxesrangescache-levelcache-unifiedinterrupt-parentinterruptsinterrupts-extendedriscv,ndevdma-channels#dma-cells#reset-cellsreg-io-widthreg-shiftcurrent-speedmax-frequencybus-widthdisable-wpcap-sd-highspeedcap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104local-mac-addressclock-namesresetsphy-modephy-handlegpio-controller#gpio-cellsinterrupt-namesdr_mode#mbox-cellsethernet0serial0serial1serial2serial3serial4stdout-path