r8g( +gmilkv,marsstarfive,jh7110  &Milk-V Marscpus ,= cpu@0sifive,s7riscv?CcpuO@b@o@|rv64imac_zba_zbbrv64i,imaczbazbbzicntrzicsrzifenceizihpm disabledinterrupt-controllerriscv,cpu-intc cpu@1sifive,u74-mcriscv?@@((CcpuO@b@o3>( Iriscv,sv39|rv64imafdc_zba_zbbrv64i0imafdczbazbbzicntrzicsrzifenceizihpmR\pwcpuinterrupt-controllerriscv,cpu-intccpu@2sifive,u74-mcriscv?@@((CcpuO@b@o3>( Iriscv,sv39|rv64imafdc_zba_zbbrv64i0imafdczbazbbzicntrzicsrzifenceizihpmR\pwcpuinterrupt-controllerriscv,cpu-intccpu@3sifive,u74-mcriscv?@@((CcpuO@b@o3>( Iriscv,sv39|rv64imafdc_zba_zbbrv64i0imafdczbazbbzicntrzicsrzifenceizihpmR\pwcpuinterrupt-controllerriscv,cpu-intccpu@4sifive,u74-mcriscv?@@((CcpuO@b@o3>( Iriscv,sv39|rv64imafdc_zba_zbbrv64i0imafdczbazbbzicntrzicsrzifenceizihpmR\pwcpu interrupt-controllerriscv,cpu-intccpu-mapcluster0core0core1core2core3core4 opp-table-0operating-points-v2opp-375000000Z  5opp-500000000e 5opp-750000000, 5opp-1500000000Yh/ހthermal-zonescpu-thermal: cooling-mapsmap0 0 tripscpu-alert0 LJpassive cpu-crit  Jcriticaldvp-clock fixed-clock dvp_clk3@l9gmac0-rgmii-rxin-clock fixed-clock gmac0_rgmii_rxin3@sY@4gmac0-rmii-refin-clock fixed-clock gmac0_rmii_refin3@3gmac1-rgmii-rxin-clock fixed-clock gmac1_rgmii_rxin3@sY@'gmac1-rmii-refin-clock fixed-clock gmac1_rmii_refin3@&hdmitx0-pixel-clock fixed-clock hdmitx0_pixelclk3@@<i2srx-bclk-ext-clock fixed-clock i2srx_bclk_ext3@i2srx-lrck-ext-clock fixed-clock i2srx_lrck_ext3@i2stx-bclk-ext-clock fixed-clock i2stx_bclk_ext3@#i2stx-lrck-ext-clock fixed-clock i2stx_lrck_ext3@$mclk-ext-clock fixed-clock  mclk_ext3@oscillator fixed-clock osc3@n6 rtc-oscillator fixed-clock rtc_osc3@5stmmac-axi-configP\l|@ 0tdm-ext-clock fixed-clock tdm_ext3@soc simple-bus  timer@2000000$starfive,jh7110-clintsifive,clint0?P  cache-controller@2010000,starfive,jh7110-ccachesifive,ccache0cache?@Q@dq interrupt-controller@c000000'starfive,jh7110-plicsifive,plic-1.0.0? H           serial@10000000snps,dw-apb-uart?pwbaudclkapb_pclkS okaydefaultserial@10010000snps,dw-apb-uart?pwbaudclkapb_pclkU! disabledserial@10020000snps,dw-apb-uart?pwbaudclkapb_pclkW" disabledi2c@10030000snps,designware-i2c?pwrefL# okay@,-Edefaulti2c@10040000snps,designware-i2c?pwrefM$  disabledi2c@10050000snps,designware-i2c?pwrefN% okay@,-Edefaultspi@10060000arm,pl022arm,primecell?pwsspclkapb_pclkE&]"t okaydefaultspi@0rohm,dh2228fv?{spi@10070000arm,pl022arm,primecell?pwsspclkapb_pclkF']"t  disabledspi@10080000arm,pl022arm,primecell?pwsspclkapb_pclkG(]"t  disabledtdm@10090000starfive,jh7110-tdm? ,p4wtdm_ahbtdm_apbtdm_internaltdmmclk_innertdm_extikjrxtx disabledi2s@100e0000starfive,jh7110-i2srx?<p@wi2sclkapbmclkmclk_innermclk_extbclklrckbclk_extlrck_extcd txrx  disabledpwmdac@100b0000starfive,jh7110-pwmdac? p wapbcore`txokaydefault>usb@10100000starfive,jh7110-usb (pwlpmstbapbaxiutmi_apb   pwrupapbaxiutmi_apbokay peripheralusb@0 cdns,usb3? otgxhcidev dlnhostperipheralotgcdns3,usb2-phyphy@10200000starfive,jh7110-usb-phy? p_w125mapp_125mphy@10210000starfive,jh7110-pcie-phy?!phy@10220000starfive,jh7110-pcie-phy?"clock-controller@10230000starfive,jh7110-stgcrg?#<p 6_7 Hwoschifi4_corestg_axiahbusb_125mcpu_bushifi4_axinocstg_busapb_bus3syscon@10240000"starfive,jh7110-stg-sysconsyscon?$serial@12000000snps,dw-apb-uart?pwbaudclkapb_pclkY- disabledserial@12010000snps,dw-apb-uart?pwbaudclkapb_pclk[. disabledserial@12020000snps,dw-apb-uart?pwbaudclkapb_pclk]/ disabledi2c@12030000snps,designware-i2c?pwrefO0  disabledi2c@12040000snps,designware-i2c?pwrefP1  disabledi2c@12050000snps,designware-i2c?pwrefQ2 okay@,-Edefault!pmic@36x-powers,axp15060?6regulatorsdcdc1&8L2Zd2Z|vcc_3v3+dcdc28L d|vdd-cpualdo4&8Lw@d2Z |emmc_vdd,i2c@12060000snps,designware-i2c?pwrefR3 okay@,-Edefault"spi@12070000arm,pl022arm,primecell?pwsspclkapb_pclkH4]"t  disabledspi@12080000arm,pl022arm,primecell?pwsspclkapb_pclkI5]"t  disabledspi@12090000arm,pl022arm,primecell? pwsspclkapb_pclkJ6]"t  disabledspi@120a0000arm,pl022arm,primecell? pwsspclkapb_pclkK7]"t  disabledi2s@120b0000starfive,jh7110-i2stx0? $p$wi2sclkapbmclkmclk_innermclk_extef/tx disabledi2s@120c0000starfive,jh7110-i2stx1? <p#$@wi2sclkapbmclkmclk_innermclk_extbclklrckbclk_extlrck_extgh0tx disabledpwm@120d0000%starfive,jh7110-pwmopencores,pwm-v1? pylokaydefault%temperature-sensor@120e0000starfive,jh7110-temp?p wsensebus|{ sensebus spi@13010000#starfive,jh7110-qspicdns,qspi-nor ?!@pZWX wrefahbapb>=?qspiqspi-ocprstc_refokay flash@0jedec,spi-nor?{ partitionsfixed-partitions spl@0?uboot-env@f0000?uboot@100000?@reserved-data@600000?`clock-controller@13020000starfive,jh7110-syscrg?<p &'#$(((woscgmac1_rmii_refingmac1_rgmii_rxini2stx_bclk_exti2stx_lrck_exti2srx_bclk_exti2srx_lrck_exttdm_extmclk_extpll0_outpll1_outpll2_out3syscon@13030000-starfive,jh7110-sys-sysconsysconsimple-mfd?clock-controllerstarfive,jh7110-pllp 3(pinctrl@13040000starfive,jh7110-sys-pinctrl?ppV)9-i2c0-0i2c-pinsE 9 :LYfi2c2-0i2c-pinsE;x<|LYfi2c5-0!i2c-pinsEOPLYfi2c6-0"i2c-pinsEVWLYfmmc0-0*rst-pinsE>{ mmc-pins(E@ABCDEFGHI{ Ymmc1-0.clk-pinsE7 { mmc-pinsE,9L -:P .;T /okayR^b  -) default.ethernet@16030000&starfive,jh7110-dwmacsnps,dwmac-5.20?(p//m/owstmmacethpclkptp_reftxgtx//stmmacethahb macirqeth_wake_irqeth_lpi(6@Qm~0 1 okay2 rgmii-idR/ /mdio snps,dwmac-mdioethernet-phy@0?7Tq ^ 2ethernet@16040000&starfive,jh7110-dwmacsnps,dwmac-5.20?(pbafjkwstmmacethpclkptp_reftxgtxBCstmmacethahb NMLmacirqeth_wake_irqeth_lpi(6@Qm~0  disableddma-controller@16050000starfive,jh7110-axi-dma?pwcore-clkcfgr-clkI  " 3 C S aclock-controller@17000000starfive,jh7110-aoncrg?(p 34 l5Nwoscgmac0_rmii_refingmac0_rgmii_rxinstg_axiahbapb_busgmac0_gtxclkrtc_osc3/syscon@17010000"starfive,jh7110-aon-sysconsyscon? x1pinctrl@17020000starfive,jh7110-aon-pinctrl?/U)9power-controller@17030000starfive,jh7110-pmu?o x:csi@19800000#starfive,jh7110-csi2rxcdns,csi2rx?0p6666 6 6 Fwsys_clkp_clkpixel_if0_clkpixel_if1_clkpixel_if2_clkpixel_if3_clk06 666665sysreg_bankpixel_if0pixel_if1pixel_if2pixel_if37dphyokayR6b@ports port@0?port@1?endpoint 8;clock-controller@19810000starfive,jh7110-ispcrg?p34591wisp_top_coreisp_top_axinoc_bus_isp_axidvp_clk)*3 :6phy@19820000starfive,jh7110-dphy-rx?p666 wcfgreftx66 17isp@19840000starfive,jh7110-camss ? sysconisp8p66 66 634Ewapb_funcwrapper_clk_cdvp_invaxiwrmipi_rx0_pxlispcore_2xisp_axi0666 6 )*6wrapper_pwrapper_caxirdaxiwrisp_top_nisp_top_axi :\WZXokayR66bO` =ports port@0?port@1?endpoint ;8clock-controller@295c0000starfive,jh7110-voutcrg?)\,p:=>?<Vwvout_srcvout_top_ahbvout_top_axivout_top_hdmitx0_mclki2stx0_bclkhdmitx0_pixelclk+3 :aliases /soc/ethernet@16030000 /soc/i2c@10030000 /soc/i2c@10050000 /soc/i2c@12050000 /soc/i2c@12060000 /soc/mmc@16010000 /soc/mmc@16020000 /soc/serial@10000000chosen serial0:115200n8memory@40000000Cmemory?@gpio-restart gpio-restart -# Xaudio-codeclinux,spdif-dit?soundsimple-audio-card StarFive-PWMDAC-Sound-Card simple-audio-card,dai-link@0? left_j = =cpu !>=codec !? compatible#address-cells#size-cellsmodeltimebase-frequencyregdevice_typei-cache-block-sizei-cache-setsi-cache-sizenext-level-cacheriscv,isariscv,isa-baseriscv,isa-extensionsstatusphandleinterrupt-controller#interrupt-cellsd-cache-block-sized-cache-setsd-cache-sized-tlb-setsd-tlb-sizei-tlb-setsi-tlb-sizemmu-typetlb-splitoperating-points-v2clocksclock-names#cooling-cellscpu-supplycpuopp-sharedopp-hzopp-microvoltpolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresisclock-output-names#clock-cellsclock-frequencysnps,lpi_ensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,bleninterrupt-parentrangesinterrupts-extendedinterruptscache-levelcache-unifiedriscv,ndevresetsreg-io-widthreg-shiftpinctrl-namespinctrl-0i2c-sda-hold-time-nsi2c-sda-falling-time-nsi2c-scl-falling-time-nsarm,primecell-periphidnum-csspi-max-frequencydmasdma-names#sound-dai-cellsstarfive,sysconstarfive,stg-sysconreset-namesdr_modereg-namesinterrupt-namesphysphy-names#phy-cells#reset-cellsregulator-boot-onregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-name#pwm-cells#thermal-sensor-cellscdns,fifo-depthcdns,fifo-widthcdns,trigger-addresscdns,read-delaycdns,tshsl-nscdns,tsd2d-nscdns,tchsh-nscdns,tslch-nsgpio-controller#gpio-cellspinmuxbias-disableinput-enableinput-schmitt-enablebias-pull-updrive-strengthinput-disableinput-schmitt-disableslew-ratelli-bus-interface-ahb1mem-bus-interface-ahb1memcpy-burst-sizememcpy-bus-width#dma-cellsfifo-watermark-aligneddata-addrstarfive,sysregassigned-clocksassigned-clock-ratescap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vcap-mmc-hw-resetpost-power-on-delay-msvmmc-supplyvqmmc-supplyno-sdiono-mmccd-gpiosdisable-wpcap-sd-highspeedrx-fifo-depthtx-fifo-depthsnps,multicast-filter-binssnps,perfect-filter-entriessnps,fixed-burstsnps,no-pbl-x8snps,force_thresh_dma_modesnps,axi-configsnps,tsosnps,en-tx-lpi-clockgatingsnps,txpblsnps,rxpblphy-handlephy-modestarfive,tx-use-rgmii-clkassigned-clock-parentsmotorcomm,tx-clk-adj-enabledmotorcomm,tx-clk-10-invertedmotorcomm,tx-clk-100-invertedmotorcomm,tx-clk-1000-invertedmotorcomm,rx-clk-drv-microampmotorcomm,rx-data-drv-microamprx-internal-delay-pstx-internal-delay-psdma-channelssnps,dma-masterssnps,data-widthsnps,block-sizesnps,prioritysnps,axi-max-burst-len#power-domain-cellsremote-endpointpower-domainsethernet0i2c0i2c2i2c5i2c6mmc0mmc1serial0stdout-pathsimple-audio-card,nameformatbitclock-masterframe-mastersound-dai